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Analytical model of nanoscale junctionless transistors towards controlling of short channel effects through source drain underlap and channel thickness engineering


AbstractWe develop a 2D analytical subthreshold model for nanoscale double-gate junctionless transistors (DGJLTs) with gate-source/drain underlap. The model is validated using well-calibrated TCAD simulation deck obtained by comparing experimental data in the literature. To analyze and control short-channel effects, we calculate the threshold voltage, drain induced barrier lowering (DIBL) and subthreshold swing of DGJLTs using our model and compare them with corresponding simulation value at channel length of 20 nm with channel thickness tSiranging 5–10 nm, gate-source/drain underlap (LSD) values 0–7 nm and source/drain doping concentrations (NSD) ranging 5–12 × 1018 cm−3. AstSireduces from 10 to 5 nmDIBLdrops down from 42.5 to 0.42 mV/V atNSD = 1019 cm−3andLSD = 5 nm in contrast to decrement from 71 to 4.57 mV/V without underlap. For a lowertSiDIBLincreases marginally with increasingNSD. The subthreshold swing reduces more rapidly with thinning of channel thickness rather than increasingLSDor decreasingNSD.HighlightsAnalytical model for nanoscale DGJLTs with source/drain underlap is developed.Threshold voltage, DIBL and subthreshold swing of JLTs are analytically calculated.Impact of source/drain underlap and channel thickness on SCEs is investigated.SCEs reduce more rapidly with reducing channel thickness than source/drain underlap.......

【作者名称】: Debapriya Roy, Abhijit Biswas
【作者单位】: Institute of Radio Physics and Electronics, University of Calcutta, Institute of Radio Physics and Electronics, University of Calcutta
【关 键 词】: Junctionless transistor, Gate-source/drain underlap, Model, Short channel effects, TCAD
【期刊名称】: Superlattices and microstructures
【期刊论文数据库】: [DBS_Articles_01]
【期刊论文编号】: 107,448,762
【摘要长度】: 3,390
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